VLSI Design trainer Jagruti Education and Welfare Society

, Jun 12, 2019
Job Description

RTL Design, verification
Work and Training Experience in CAD or ASIC VLSI designs
Develop test bench , including verification IP components to validate SOC
Excellent programming skills in Verilog HDL, System Verilog
Good working knowledge in SV/UVM. System C
Strong in Python and significant experience in Perl.
FPGA Implementation, understanding of Timing Analysis,
High Level Synthesis with Cadence Front & back end design is added advantage

Salary: Not Disclosed by Recruiter
Industry: Education / Teaching / Training
Functional Area: Teaching, Education, Training, Counselling
Role Category: Teachers
Role: Technical / Process Trainer
Employment Type: Permanent Job, Full Time

Job Types: Full-time, Part-time

Salary: ?90,000.00 to ?110,000.00 /month


work: 1 year (Preferred)
Teaching: 1 year (Preferred)
Making lesson Plans: 1 year (Preferred)


Secondary(10th Pass) (Preferred)


English (Preferred)

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